Performance evaluation of pass-transistor-based circuits using monolayer and bilayer 2-D transition metal dichalcogenide (TMD) MOSFETs for 5.9nm node

Chang Hung Yu, Jun Teng Zheng, Pin Su, Ching Te Chuang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

We comprehensively evaluate and benchmark the performance of pass-transistor logic (PTL) circuits using monolayer and bilayer transition metal dichalcogenide (TMD) devices based on ITRS 2028 node. Our study indicates that the higher VT of bilayer TMD devices significantly degrades the performance of single pass-transistor based circuits compared with the monolayer counterparts despite the higher mobility of bilayer TMD devices. The effect can be mitigated by using full transmission gate or providing a complementary path.

Original languageEnglish
Title of host publication2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509058051
DOIs
StatePublished - 7 Jun 2017
Event2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017 - Hsinchu, Taiwan
Duration: 24 Apr 201727 Apr 2017

Publication series

Name2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017

Conference

Conference2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017
CountryTaiwan
CityHsinchu
Period24/04/1727/04/17

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