Performance benchmarking of monolayer and bilayer two-dimensional transition metal dichalcogenide (TMD) based logic circuits

Chang Hung Yu, Pin Su, Ching Te Chuang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

Because of their atomic-scale thickness, adequate band-gap, and pristine interface, monolayer or bilayer two-dimensional transition metal dichalcogenides (TMDs) such as MoS2 and WSe2 (Fig. 1(a)) have emerged as potential channel materials for future ultimately scaled low-power CMOS devices [1-7]. Bilayer TMD devices have been shown to exhibit higher mobility at the expense of device electrostatics compared with monolayer TMD devices [2-6]. While the scalability and performance potential of MoS2 and WSe2 devices have been widely investigated [1-3], a thorough study of the extremely scaled TMD-based logic circuits has been lacking.

Original languageEnglish
Title of host publication2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781467394789
DOIs
StatePublished - 27 May 2016
EventInternational Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016 - Hsinchu, Taiwan
Duration: 25 Apr 201627 Apr 2016

Publication series

Name2016 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016

Conference

ConferenceInternational Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2016
CountryTaiwan
CityHsinchu
Period25/04/1627/04/16

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