Parallelism exploitation in superscalar multiprocessing

N. P. Lu*, Chung-Ping Chung

*Corresponding author for this work

Research output: Contribution to journalArticle

2 Scopus citations

Abstract

To exploit more parallelism in programs, superscalar multiprocessor systems, which exploit both fine-grained and coarsegrained parallelism, have been the trend in designing high-speed computing systems. Recently, the authors have developed a simulator for evaluating superscalar multiprocessor systems. This simulator models both a superscalar processor that can exploit instruction-level parallelism, and a shared-memory multiprocessor system that can exploit task-level parallelism. This simulator was used to run four applications chosen from the SPLASH-2 benchmark suite, and collected some performance data to investigate the parallelism exploitation capability of the superscalar multiprocessor systems in various configurations. It was observed that the instruction-level and task-level parallelism in programs can be exploited well by a moderate degree of superscalar processing and a high degree of multiprocessing. For example, the speedup of a 32-way multiprocessor with eight-issue processors can be over 200 relative to a single-issue uniprocessor.

Original languageEnglish
Pages (from-to)255-264
Number of pages10
JournalIEE Proceedings: Computers and Digital Techniques
Volume145
Issue number4
DOIs
StatePublished - 1 Jan 1998

Keywords

  • Multiprocessing systems
  • Parallel processing
  • Superscalar multiprocessing

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