P-MOSFET gate current and device degradation

Tong Chern Ong*, Koichi Seki, Ping K. Ko, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

1 Scopus citations

Abstract

Hot-carrier-limited device lifetime of surface-channel p-MOSFETs (p-channel metal-oxide-semiconductor field-effect transistors) is found to correlate well with gate current over a wide range of bias. The same result is not observed for buried-channel p-MOSFETs. A gate current model for surface-channel p-MOSFETs is presented. Using this gate current model, reasonable estimates of AC (pulse) stress lifetime can be made based on DC stress data.

Original languageEnglish
Pages193-196
Number of pages4
DOIs
StatePublished - 1 Dec 1989
EventInternational Symposium on VLSI Technology, Systems and Applications - Proceedings of Technical Papers - Taipei, Taiwan
Duration: 17 May 198919 May 1989

Conference

ConferenceInternational Symposium on VLSI Technology, Systems and Applications - Proceedings of Technical Papers
CityTaipei, Taiwan
Period17/05/8919/05/89

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