The electrical properties of oxides grown on textured single-crystal silicon (TSC oxides) are dependent on the process used to roughen or texture the single-crystal silicon surface. This study examines the effects of different processing steps on the I-V, C-V, charge trapping, interface traps generation, and breakdown characteristics of TSC oxides. By choosing a particular set of processing steps, a TSC oxide can exhibit enhanced conduction and very good charge trapping and breakdown characteristics, which makes it an interesting dielectric for EEPROM applications. Floating-gate EEPROM's have been fabricated using this TSC oxide demonstrating the feasibility of this new technology. Programming, cycling, and retention characteristics of this EEPROM are presented. In particular, the retention data of the TSC EEPROM show an improvement over that of EEPROMs using oxides grown on untextured single-crystal silicon.