Oscillation ring based interconnect test scheme for SOC

Katherine Shu Min Li*, Chung Len Lee, Chau-Chin Su, Jwu E. Chen

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

24 Scopus citations

Abstract

We propose a novel oscillation ring (OR) test architecture for testing interconnects in SoC. In addition to stuck-at and open faults, this scheme can detect delay faults and crosstalk glitches. IEEE P1500 wrapper cells are modified. An efficient ring-generation algorithm is proposed to construct ORs based on a graph model. Experimental results on MCNC benchmark circuits show the feasibility of the scheme and the effectiveness of,the algorithm. Our method achieves 100% fault coverage with a small number of tests.

Original languageEnglish
Title of host publicationProceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005
Pages184-187
Number of pages4
DOIs
StatePublished - 1 Dec 2005
Event2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005 - Shanghai, China
Duration: 18 Jan 200521 Jan 2005

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Volume1

Conference

Conference2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005
CountryChina
CityShanghai
Period18/01/0521/01/05

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    Li, K. S. M., Lee, C. L., Su, C-C., & Chen, J. E. (2005). Oscillation ring based interconnect test scheme for SOC. In Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005 (pp. 184-187). [1466154] (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; Vol. 1). https://doi.org/10.1109/ASPDAC.2005.1466154