Origin of the threshold voltage instability in SiO2/HfO2 dual layer gate dielectrics

A. Kerber*, E. Cartier, L. Pantisano, R. Degraeve, T. Kauerauf, Y. Kim, Tuo-Hung Hou, G. Groeseneken, H. E. Maes, U. Schwalke

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

334 Scopus citations

Abstract

The magnitude of the VT instability in conventional MOSFETs and MOS capacitors with SiO2/HfO2 dual-layer gate dielectrics is shown to depend strongly on the details of the measurement sequence used. By applying time-resolved measurements (capacitance-time traces and charge-pumping measurements), it is demonstrated that this behavior is caused by the fast charging and discharging of preexisting defects near the SiO2/HfO2 interface and in the bulk of the HfO2 layer. Based on these results, a simple defect model is proposed that can explain the complex behavior of the VT instability in terms of structural defects as follows. 1) A defect band in the HfO2 layer is located in energy above the Si conduction band edge. 2) The defect band shifts rapidly in energy with respect to the Fermi level in the Si substrate as the gate bias is varied. 3) The rapid energy shifts allows for efficient charging and discharging of the defects near the SiO2/HfO2 interface by tunneling.

Original languageEnglish
Pages (from-to)87-89
Number of pages3
JournalIEEE Electron Device Letters
Volume24
Issue number2
DOIs
StatePublished - 1 Feb 2003

Keywords

  • Charge trapping
  • HfO

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