Optimizing Incremental Step Pulse Programming for RRAM Through Device-Circuit Co-Design

Jen Chieh Liu, Tzu Yun Wu, Tuo-Hung Hou*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

5 Scopus citations

Abstract

A device-circuit co-design strategy of incremental step pulse programming (ISPP) tailored specifically for resistive-switching random access memory (RRAM) is elaborated using HfO2 RRAM as an example. The proposed strategy optimizes ISPP by considering programming energy, speed, peripheral circuit design, and device lifetime simultaneously. Interplay between ISPP configuration and device switching behavior is comprehensively clarified, and the result provides useful indicators for estimating peripheral circuit overhead and programming performance. Overstress effects affect both switching voltages and endurance lifetime substantially and, thus, should be carefully minimized.

Original languageEnglish
Pages (from-to)617-621
Number of pages5
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume65
Issue number5
DOIs
StatePublished - 1 May 2018

Keywords

  • device-circuit co-design
  • ISPP
  • over stress
  • RRAM

Fingerprint Dive into the research topics of 'Optimizing Incremental Step Pulse Programming for RRAM Through Device-Circuit Co-Design'. Together they form a unique fingerprint.

Cite this