On Tolerating Faults of TSV/Microbumps for Power Delivery Networks in 3D IC

Sheng Hsin Fang, Chang Tzu Lin, Wei Hsun Liao, Chien Chia Huang, Li Chin Chen, Hung-Ming Chen, I. Hsuan Lee, Ding Ming Kwai, Yung Fa Chou

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

In 3DIC design, we may face the problem in manufacturing faults of through silicon vias (TSVs) and microbumps, and it will cause insufficient power delivery and eventually result in fatal error of functioning. In this work, we propose a power TSV/microbump fault tolerance scheme to resolve this issue. First, we use a fast heuristic to predict the worst IR-drop distribution under a given faulty rate by analyzing power simulation results. Next, we use an incremental repair method to enhance power delivery network until reaching the given target IR-drop. The experimental results show that our methodology is effective in power delivery network enhancement in TSV/microbump DFM.

Original languageEnglish
Title of host publicationProceedings - 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017
EditorsRicardo Reis, Mircea Stan, Michael Huebner, Nikolaos Voros
PublisherIEEE Computer Society
Pages459-464
Number of pages6
ISBN (Electronic)9781509067626
DOIs
StatePublished - 20 Jul 2017
Event2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017 - Bochum, North Rhine-Westfalia, Germany
Duration: 3 Jul 20175 Jul 2017

Publication series

NameProceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
Volume2017-July
ISSN (Print)2159-3469
ISSN (Electronic)2159-3477

Conference

Conference2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017
CountryGermany
CityBochum, North Rhine-Westfalia
Period3/07/175/07/17

Keywords

  • 3D IC
  • Fault tolerance
  • Power delivery network

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