On the performance of an indicator-based stall avoidance mechanism for high-speed downlink packet access systems

Li-Chun Wang*, Chih Wen Chang, Chung Ju Chang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

3 Scopus citations

Abstract

The stall of delivering medium access control (MAC) layer data to the upper layer is a serious problem when a negative acknowledgement (NACK) control signal becomes an acknowledgement (ACK) signal, especially for a high-speed mobile terminal during handoff. Stall avoidance mechanisms aim to reduce such the transmission delay and keep in-sequence delivery of the MAC layer data to the upper layer. Recently, for providing high-speed downlink packet access (HSDPA) in the wideband code-division multiple access system, an indicator-based stall avoidance (ISA) mechanism was proposed to remove the nonrecoverable gap in the received out-of-sequence packets. In this paper, we derive the closed-form expression for the gap-processing time of the ISA mechanism when applying the multiprocess stop-and-wait (SAW) hybrid automatic repeat request (HARQ) mechanism. The derived analytical formulas can be used to understand performance tradeoffs between the gap-processing time and throughput in terms of various numbers of users and parallel processes when implementing the multiprocess SAW HARQ mechanism in the HSDPA system.

Original languageEnglish
Article number1608645
Pages (from-to)691-703
Number of pages13
JournalIEEE Transactions on Vehicular Technology
Volume55
Issue number2
DOIs
StatePublished - 1 Mar 2006

Keywords

  • Gap processing time
  • HARQ
  • HSDPA
  • Multiprocess SAW HARQ
  • Stall
  • Stall avoidance

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