On the body-source built-in potential lowering of SOI MOSFETs

Pin Su*, Samuel K.H. Fung, Peter W. Wyatt, Hui Wan, Ali M. Niknejad, Mansun Chan, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to journalArticle

15 Scopus citations

Abstract

This letter provides a viewpoint for the characterization of state-of-the-art thin film sllicon-on-insulator (SOI) MOSFETs. Based on body - source built-in potential lowering, the degree of full depletion can be quantified. In addition to serving as a measure of the floating-body behavior of SOI devices, the concept also enables the consolidation of partial-depletion (PD) and full-depletion (FD) SOI compact models. This consolidation of compact models together with the trend of coexistence of PD/FD devices in a single chip has become one of the greatest challenges in the scaling of SOI CMOS.

Original languageEnglish
Pages (from-to)90-92
Number of pages3
JournalIEEE Electron Device Letters
Volume24
Issue number2
DOIs
StatePublished - 1 Feb 2003

Keywords

  • Body-source built-in potential lowering
  • Floating-body effect
  • Impact ionization
  • Silicon-film-thickness scaling
  • SOI CMOS

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