On system-level verification of VLSI signal processing

Lan-Rong Dung*, Tsung Hsi Chiang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Formal verification in high level design, which means architecture design, is different from functional verification in Register-Transfer Level(RTL) level. DSP algorithms need high level transformation to achieve optimal goals before mapping on a silicon. However, there is absent of suitable CAD tool to support the simulation and verification in high level. This paper presents a novel modeling and formal verification methodology of dataflow graph in system level base on Petri net (PN) model. We present transformation from FSFG to PN model. Then, verification method which includes static and dynamic phase is also addressed. In the last, we introduced our software implementation, called HiVED, to show the experimental results.

Original languageEnglish
Title of host publicationInternational Symposium on Performance Evaluation of Computer and Telecommunication Systems 2007, SPECTS'07, Part of the 2007 Summer Simulation Multiconference, SummerSim'07
Pages505-511
Number of pages7
StatePublished - 1 Dec 2007
EventInternational Symposium on Performance Evaluation of Computer and Telecommunication Systems 2007, SPECTS 2007, Part of the 2007 Summer Simulation Multiconference, SummerSim 2007 - San Diego, CA, United States
Duration: 15 Jul 200718 Jul 2007

Publication series

NameInternational Symposium on Performance Evaluation of Computer and Telecommunication Systems 2007, SPECTS'07, Part of the 2007 Summer Simulation Multiconference, SummerSim'07

Conference

ConferenceInternational Symposium on Performance Evaluation of Computer and Telecommunication Systems 2007, SPECTS 2007, Part of the 2007 Summer Simulation Multiconference, SummerSim 2007
CountryUnited States
CitySan Diego, CA
Period15/07/0718/07/07

Keywords

  • Dataflow computing
  • Formal verification
  • Fully specified signal-flow graph
  • Petri- Net modeling

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