On efficient behavioral modeling to accurately predict supply noise effects of PLL designs in real systems

Chin Cheng Kuo*, Chien-Nan Liu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

Using behavioral models to perform system simulation at behavioral level is currently a popular solution to verify SOC designs. For analog behavioral models, most of previous approaches are developed with the assumption that noise waveforms are known functions, such as sinusoid waves or Gaussian noise. However, while co-simulated with other blocks in the system, the actual supply noise induced by other circuits is often very irregular and unpredictable. Therefore, the simulation results may still have some errors in real environment. In this paper, an efficient behavioral modeling approach for PLL designs is proposed to analyze the real-time supply noise effects. Instead of directly modeling the final circuit performance as a single complicated equation, we try to model suitable intermediate parameters whose relationship to supply noise is much simpler. The experimental results have shown that our approach can accurately deal with irregular noise with such a simple model.

Original languageEnglish
Title of host publicationIFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip
Pages116-121
Number of pages6
DOIs
StatePublished - 1 Dec 2006
EventIFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip, VLSI-SoIC 2006 - Nice, France
Duration: 16 Oct 200618 Oct 2006

Publication series

NameIFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip

Conference

ConferenceIFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip, VLSI-SoIC 2006
CountryFrance
CityNice
Period16/10/0618/10/06

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