On-current decrease after erasing operation in the nonvolatile memory device with LDD structure

Geng Wei Chang*, Ting Chang Chang, Yong En Syu, Ya-Hsiang Tai, Fu Yen Jian

*Corresponding author for this work

Research output: Contribution to journalArticle

4 Scopus citations

Abstract

The on-current decrease phenomenon is observed after erasing operation in the silicon-oxide-nitride-oxide-silicon thin-film transistors (TFTs) with lightly doped drain (LDD) structure. As nonvolatile memory, when the TFT is programmed again, the on-current decrease phenomenon can be recovered. The on-current decrease and recovery are explained by the energy band diagrams at different drain biases. The explanation implies that this phenomenon only appears in the device with LDD structure, but not in the device without LDD structure, which is experimentally verified.

Original languageEnglish
Article number5910352
Pages (from-to)1038-1040
Number of pages3
JournalIEEE Electron Device Letters
Volume32
Issue number8
DOIs
StatePublished - 1 Aug 2011

Keywords

  • Lightly doped drain (LDD)
  • nonvolatile memory
  • on-current decrease
  • silicon-oxide-nitride-oxide-silicon thin-film transistor (SONOS TFT)

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