On-chip transient voltage suppressor integrated with silicon-based transceiver IC for system-level ESD protection

Che Hao Chuang, Ming-Dou Ker

Research output: Contribution to journalArticle

9 Scopus citations

Abstract

A novel on-chip transient voltage suppressor (TVS) integrated with the silicon-based transceiver IC has been proposed and verified in a 0.8 μm bipolar CMOS DMOS (BCD) process for IEC 61000-4-2 system-level electrostatic discharge (ESD) protection. The structure of on-chip TVS is a high-voltage dual silicon-controlled rectifier (DSCR) with ±16 V of high holding voltage (Vh) under the evaluation of the transmission line pulsing (TLP) system with the pulse width of 100 ns. With the high holding current (Ih) of on-chip TVS, this design can pass ±200 mA latch-up testing. Therefore, the on-chip TVS can be safely applied to protect the RS232 transceiver with the signal level of ±15 V. The RS232 transceiver IC with on-chip TVS has been evaluated to pass the IEC61000-4-2 contact ±12 kV stress without any hardware damages and latch-up issue. Moreover, the proposed RS232 transceiver IC has been verified to well protect the system over the IEC 61000-4-2 contact ±20 kV stress (class B) in the notebook applications.

Original languageEnglish
Article number6701176
Pages (from-to)5615-5621
Number of pages7
JournalIEEE Transactions on Industrial Electronics
Volume61
Issue number10
DOIs
StatePublished - 1 Jan 2014

Keywords

  • Electrostatic discharge (ESD)
  • RS232
  • siliconcontrolled rectifier (SCR)
  • transient voltage suppressor (TVS)

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