A novel on-chip ESD protection design by using polysilicon diodes for smart card application is reported in this paper. By adding an efficient VDD-to-VSS clamp circuit, the HBM ESD level of the smart card IC with polysilicon diodes as the ESD protection devices have been successfully improved from the original approximately 300 V to become ≥3 kV. Different process splits have been experimentally evaluated to find the suitable doping concentration for optimizing, the polysilicon diodes for both smart card application and on-chip ESD protection design.
|Number of pages||10|
|Journal||Electrical Overstress/Electrostatic Discharge Symposium Proceedings|
|State||Published - 1 Dec 2000|
|Event||Electrical Overstress/Electrostatic Discharge Symposium Proceedings - Anaheim, CA, USA|
Duration: 26 Sep 2000 → 28 Sep 2000