On-Chip Capacitance Measurement Circuits in VSLI Structures

Hiroshi Iwai, Susumu Kohyama

Research output: Contribution to journalArticlepeer-review

14 Scopus citations

Abstract

A precise capacitance measurement technique is described. This technique is based on a principle of capacitively divided ac voltage measurement. Details of the measurement procedure and test pattern configuration is also discussed. Utilizing the technique, precise capacitance measurements were carried out, which were practically difficult with direct measurements, and size effects of the small geometry capacitances were measured and evaluated. The technique was found to be practical and accurate, and besides, the test device can be integrated on an LSI chip, thus it appears to be very effective in VLSI development.

Original languageEnglish
Pages (from-to)1622-1626
Number of pages5
JournalIEEE Transactions on Electron Devices
Volume29
Issue number10
DOIs
StatePublished - Oct 1982

Fingerprint Dive into the research topics of 'On-Chip Capacitance Measurement Circuits in VSLI Structures'. Together they form a unique fingerprint.

Cite this