On-chip, attofarad interconnect charge-based capacitance measurement (CBCM) technique

James C. Chen*, Bruce W. McGaughy, Dennis Sylvester, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to journalConference article

70 Scopus citations

Abstract

In this paper, a sensitive and simple technique for parasitic interconnect capacitance measurement with 0.01fF or 10 aF sensitivity is presented. This on-chip technique is based upon an efficient test structure design. No reference capacitor is needed. The measurement itself is also simple; only a DC current meter is required. We have applied this technique to extract various interconnect geometry capacitances, including the capacitance of a single Metal 2 over Metal 1 crossing, for an industrial double metal process.

Original languageEnglish
Article number5552447
Pages (from-to)69-72
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
DOIs
StatePublished - 1 Dec 1996
EventProceedings of the 1996 IEEE International Electron Devices Meeting - San Francisco, CA, USA
Duration: 8 Dec 199611 Dec 1996

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