Numerical study of C-V characteristics of double-gate ultrathin SOI MOSFETs

Hiroshi Watanabe*, Ken Uchida, Atsuhiro Kinoshita

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

6 Scopus citations

Abstract

Capacitance-voltage (C-V) characteristics of double-gate ultrathin silicon-on-insulator (SOI) MOSFETs are numerically investigated in detail. The measured back-gate bias dependence is reproduced by the Poisson-Schrödinger solver including the highly precise physical models for many-body interactions of carrier-carrier and carrier-ion, and for incomplete ionization of doping impurities in whole semiconductor regions of n+poly-Si/oxide/SOI/oxide/p-Si capacitor including the volume inversion. In addition, we study the higher subband effect at higher temperature in detail, in order to deduce the impacts of self-heating and nonstatic transport.

Original languageEnglish
Pages (from-to)52-58
Number of pages7
JournalIEEE Transactions on Electron Devices
Volume54
Issue number1
DOIs
StatePublished - 1 Jan 2007

Keywords

  • Confinement
  • Double-gate
  • MOS devices
  • Silicon-on-insulator (SOI)

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