Novel Ti-SALICIDE process with low resistivity for sub-0.2 μm CMOS technology

QiuXia Xu*, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

1 Scopus citations

Abstract

A new process for thin titanium self-aligned silicide (Ti-SALICIDE) on narrow n+poly-Si lines and n+ diffusion layers using pre-amorphization implantation (PAI) with heavy ions of antimony (Sb) and germanium (Ge) has been demonstrated for application to 0.2 μm CMOS device and beyond. Pre-amorphization enhances the phase transformation from C49 TixSix to C54 TiSi2 and lowers the transformation temperature by 80 °C so that it occurs before conglomeration in narrow lines. The sheet resistance of TiSi2 on heavily As doped poly-Si lines are 3.7 Ω/□ and 3.8 Ω/□ for the samples pre-amorphized by Ge and Sb implantations even with line width down to 0.2 μm. There is less leakage in Ti-SALICIDE diode with pre-amorphization than without it. The probable reasons and mechanisms are discussed.

Original languageEnglish
Pages47-51
Number of pages5
StatePublished - 1 Dec 1998
EventProceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology - Beijing, China
Duration: 21 Oct 199823 Oct 1998

Conference

ConferenceProceedings of the 1998 5th International Conference on Solid-State and Integrated Circuit Technology
CityBeijing, China
Period21/10/9823/10/98

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