In this study, a novel process to fill the gap between the metal lines on a wafer with air is developed. Reduction of the parasitic wire capacitance in ULSI has become an important issue for future high-speed and low-power applications. Use of low dielectric constant material as inter-level dielectric (ILD) can overcome this problem. Many new low dielectric constant materials are under study and lower dielectric constant and feasibility are the two goals of these researches. The gas-dielectric process has the lowest dielectric constant, 1.0, and its conceptual feasibility is demonstrated. Basic process characterization data, thermodynamic mechanism and requirements for air gap formation are also discussed. We calculated the relationship among the surface tension, the vaporization rate and atmospheric pressure to construct a model of the process window to show that this process is feasible and reproducible. Scanning electron microscope data show that a large area of air gap can be obtained. Basic electrical characteristics data such as I-V and C-V, measured and compared with the conventional PECVD process, show that the air gap has better isolation than PECVD process.