Novel Operation Schemes to Improve Device Reliability in a Localized Trapping Storage SONOS-type Flash Memory

C. C. Yeh*, W. J. Tsai, T. C. Lu, H. Y. Chen, H. C. Lai, N. K. Zous, Y. Y. Liao, G. D. You, S. K. Cho, C. C. Liu, F. S. Hsu, L. T. Huang, W. S. Chiang, C. J. Liu, C. F. Cheng, M. H. Chou, C. H. Chen, Ta-Hui Wang, Wenchi Ting, Sam PanJoseph Ku, Chih Yuan Lu

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

9 Scopus citations

Abstract

Over erasure, charge gain in low Vt state, and charge loss in high Vt state are found to be the most severe reliability issues in a localized trapping storage flash memory cell. In this paper, based on our understanding of physical mechanisms, we demonstrate that by adding vertical electrical field treatments during program/erase operation, the over erasure and data retentivities in high/low Vt states are significantly improved.

Original languageEnglish
Pages (from-to)173-176
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
DOIs
StatePublished - 1 Dec 2003
EventIEEE International Electron Devices Meeting - Washington, DC, United States
Duration: 8 Dec 200310 Dec 2003

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