This paper describes the key technology to realize a scaled NAND EEPROM with the minimized program disturbance. It has been clarified for the first time that the program disturbance caused by neighboring cells is drastically improved by reducing the field implantation dose. The limitation of conventional LOCOS width is estimated to be about 0.56 um. Moreover, a careful device design and an optimization of the bottom implantation are essential in a advanced STI cell.
|Number of pages||4|
|Journal||Technical Digest - International Electron Devices Meeting, IEDM|
|State||Published - 1 Dec 1997|
|Event||1997 International Electron Devices Meeting - Washington, DC, USA|
Duration: 7 Dec 1997 → 10 Dec 1997