Novel GAA raised source / drain sub-10-nm poly-Si NW channel TFTs with self-aligned corked gate structure for 3-D IC applications

Yi Hsien Lu*, Po Yi Kuo, Yi Hong Wu, Yi Hsuan Chen, Tien-Sheng Chao

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

24 Scopus citations

Abstract

A novel gate-all-around raised source / drain sub-10-nm poly-Si nanowire (NW) channel TFTs with self-aligned corked gate structure (GAA RSDNW-TFTs) have been successfully demonstrated. It is through the use of a novel fabrication process requiring no advanced lithographic tools. The corked gate (CG) structure, only the poly gate pattern was etched, reduces complex of process significantly. For the first time, several properties of this 3D architecture are explored: (i) the Si NW dimension is about 7 nm x 12 nm and a superior smooth elliptical shape is obtained in the category of poly-Si NW TFTs. (ii) the temperature dependence and the instability under PBTI stress of the main electrical parameters are proposed.

Original languageEnglish
Title of host publication2011 Symposium on VLSI Technology, VLSIT 2011 - Digest of Technical Papers
Pages142-143
Number of pages2
StatePublished - 16 Sep 2011
Event2011 Symposium on VLSI Technology, VLSIT 2011 - Kyoto, Japan
Duration: 14 Jun 201116 Jun 2011

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
ISSN (Print)0743-1562

Conference

Conference2011 Symposium on VLSI Technology, VLSIT 2011
CountryJapan
CityKyoto
Period14/06/1116/06/11

Fingerprint Dive into the research topics of 'Novel GAA raised source / drain sub-10-nm poly-Si NW channel TFTs with self-aligned corked gate structure for 3-D IC applications'. Together they form a unique fingerprint.

Cite this