TY - JOUR
T1 - Novel dielectric-engineered trapping-charge poly-si-TFT memory with a TiN-alumina-nitride-vacuum-silicon structure
AU - Wu, Chun Yu
AU - Liu, Yen Ting
AU - Liao, Ta Chuan
AU - Yu, Ming H.
AU - Cheng, Huang-Chung
PY - 2011/8/1
Y1 - 2011/8/1
N2 - High-performance poly-Si-TFT-based TiN-alumina-nitride-vacuum-silicon (TANVAS) trapping-charge memory has been demonstrated utilizing high-κ blocking oxide and vacuum tunneling layer for the first time. In particular, the vacuum, lowest κ in nature, was introduced to replace the traditional tunneling oxide. Furthermore, the alumina high-κ blocking oxide was applied to upgrade the electric field across the tunneling layer. Based on the enlarged κ-value difference between the blocking and tunneling layers, the TANVAS featured considerable field enhancement across the tunneling layer, thus much improving the program/erase efficiencies. In addition, owing to the suppression of defect creation in the tunneling layer, the TANVAS also exhibited superior retention characteristics. These excellent memory characteristics of TANVAS are therefore promising for the 3-D Flash and system-on-panel applications.
AB - High-performance poly-Si-TFT-based TiN-alumina-nitride-vacuum-silicon (TANVAS) trapping-charge memory has been demonstrated utilizing high-κ blocking oxide and vacuum tunneling layer for the first time. In particular, the vacuum, lowest κ in nature, was introduced to replace the traditional tunneling oxide. Furthermore, the alumina high-κ blocking oxide was applied to upgrade the electric field across the tunneling layer. Based on the enlarged κ-value difference between the blocking and tunneling layers, the TANVAS featured considerable field enhancement across the tunneling layer, thus much improving the program/erase efficiencies. In addition, owing to the suppression of defect creation in the tunneling layer, the TANVAS also exhibited superior retention characteristics. These excellent memory characteristics of TANVAS are therefore promising for the 3-D Flash and system-on-panel applications.
KW - Field-enhanced nanowire (FEN)
KW - high-κ
KW - poly-Si
KW - system-on-panel (SOP)
KW - thin-film transistors (TFTs)
KW - trapping-charge memory
UR - http://www.scopus.com/inward/record.url?scp=79960904129&partnerID=8YFLogxK
U2 - 10.1109/LED.2011.2158053
DO - 10.1109/LED.2011.2158053
M3 - Article
AN - SCOPUS:79960904129
VL - 32
SP - 1095
EP - 1097
JO - IEEE Electron Device Letters
JF - IEEE Electron Device Letters
SN - 0741-3106
IS - 8
M1 - 5940987
ER -