Novel 2-bit/cell wrapped-select-gate SONOS TFT memory using source-side injection for NOR-type flash array

Kuan Ti Wang*, Fang Chang Hsueh, Yu Lun Lu, Tsung Yu Chiang, Yi Hong Wu, Chia Chun Liao, Li Chen Yen, Tien-Sheng Chao

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

1 Scopus citations

Abstract

This letter is the first to successfully demonstrate the 2-bit/cell wrapped-selected-gate (WSG) SONOS thin-film transistor (TFT) memory using source-side injection (SSI). Because of the higher programming efficiency of SSI, a memory window of approximately 3 V can be easily achieved in 10 μ s and 30 ms for the program and erase modes, respectively. In addition, we performed an excellent 2-bit/cell distinguish margin for 3-V memory window in WSG-SONOS TFT memory. The optimal reliability of the endurance and data retention tests can be executed by adjusting the applied voltage appropriately.

Original languageEnglish
Article number6194261
Pages (from-to)839-841
Number of pages3
JournalIEEE Electron Device Letters
Volume33
Issue number6
DOIs
StatePublished - 10 May 2012

Keywords

  • Source-side injection (SSI)
  • thin-film transistor memory
  • two-bit/cell
  • wrapped-selected-gate (WSG)-SONOS

Fingerprint Dive into the research topics of 'Novel 2-bit/cell wrapped-select-gate SONOS TFT memory using source-side injection for NOR-type flash array'. Together they form a unique fingerprint.

Cite this