TY - JOUR
T1 - Nonvolatile memory with a metal nanocrystal/nitride heterogeneous floating-gate
AU - Lee, Chungho
AU - Hou, Tuo-Hung
AU - Kan, Edwin Chih Chuan
PY - 2005/12/1
Y1 - 2005/12/1
N2 - Heterogeneous floating-gates consisting of metal nanocrystals and silicon nitride (Si3N4) for nonvolatile memory applications have been fabricated and characterized. By combining the self-assembled Au nanocrystals and plasma-enhanced chemical vapor deposition (PECVD) nitride layer, the heterogeneous-stack devices can achieve enhanced retention, endurance, and low-voltage program/erase characteristics over single-layer nanocrystals or nitride floating-gate memories. The metal nanocrystals at the lower stack enable the direct tunneling mechanism during program/erase to achieve low-voltage operation and good endurance, while the nitride layer at the upper stack works as an additional charge trap layer to enlarge the memory window and significantly improve the retention time. The write/erase time of the heterogeneous stack is almost the same as that of the single-layer metal nanocrystals. In addition, we could further enhance the memory window by stacking more nanocrystal/nitride heterogeneous layers, as long as the effective oxide thickness from the control gate is still within reasonable ranges to control the short channel effects.
AB - Heterogeneous floating-gates consisting of metal nanocrystals and silicon nitride (Si3N4) for nonvolatile memory applications have been fabricated and characterized. By combining the self-assembled Au nanocrystals and plasma-enhanced chemical vapor deposition (PECVD) nitride layer, the heterogeneous-stack devices can achieve enhanced retention, endurance, and low-voltage program/erase characteristics over single-layer nanocrystals or nitride floating-gate memories. The metal nanocrystals at the lower stack enable the direct tunneling mechanism during program/erase to achieve low-voltage operation and good endurance, while the nitride layer at the upper stack works as an additional charge trap layer to enlarge the memory window and significantly improve the retention time. The write/erase time of the heterogeneous stack is almost the same as that of the single-layer metal nanocrystals. In addition, we could further enhance the memory window by stacking more nanocrystal/nitride heterogeneous layers, as long as the effective oxide thickness from the control gate is still within reasonable ranges to control the short channel effects.
KW - Direct tunneling
KW - Nanocrystal/nitride heterogeneous floating-gate
KW - Nonvolatile memories
UR - http://www.scopus.com/inward/record.url?scp=29244472213&partnerID=8YFLogxK
U2 - 10.1109/TED.2005.859615
DO - 10.1109/TED.2005.859615
M3 - Article
AN - SCOPUS:29244472213
VL - 52
SP - 2697
EP - 2702
JO - Ieee Transactions On Electron Devices
JF - Ieee Transactions On Electron Devices
SN - 0018-9383
IS - 12
ER -