Noise-tolerant XOR-based conditional keeper for high fan-in dynamic circuits

Chung Hsien Hua*, Wei Hwang, Chih Kai Chen

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

27 Scopus citations

Abstract

Noise-tolerant XOR-based conditional keeper for high fan-in dynamic circuits is presented in this paper. Noise immunity is enhanced by conditionally turning on the conditional keepers. The conditional keeper is turned off at some critical moments to reduce the delay and power consumption. The timing of control signals and their effects on noise immunity, power and delay are also examined. High fanin dynamic circuits are used to demonstrate the effectiveness of the conditional keeper on noise immunity. Distributed power gating combined with clock gating design is also examined. All the simulation results are based on TSMC 100nm CMOS technology. Compared to conventional techniques, under the same unity-gain DC noise criteria, more than 20% power reduction and 20% delay reduction are achieved. Under the same delay criteria, more than 1.25X noise immunity improvement is attained.

Original languageEnglish
Article number1464620
Pages (from-to)444-447
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
DOIs
StatePublished - 1 Dec 2005
EventIEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 - Kobe, Japan
Duration: 23 May 200526 May 2005

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