New gate-bias voltage-generating technique with threshold-voltage compensation for on-glass analog circuits in LTPS process

Jung Sheng Chen*, Ming-Dou Ker

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

8 Scopus citations

Abstract

A new proposed gate-bias voltage-generating technique with threshold-voltage compensation for analog circuits in the low-temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) is proposed. The new proposed gate-bias voltage-generating circuit with threshold-voltage compensation has been successfully verified in an 8-μm LTPS process. The experimental results have shown that the impact of TFT threshold-voltage variation on the biasing circuit can be reduced from 30% to 5% under a biasing voltage of 3 V. The new proposed gate-bias voltage-generating technique with threshold-voltage compensation enables the analog circuits to be integrated and implemented by the LTPS process on glass substrate for an active matrix LCD panel.

Original languageEnglish
Pages (from-to)309-314
Number of pages6
JournalIEEE/OSA Journal of Display Technology
Volume3
Issue number3
DOIs
StatePublished - 1 Sep 2007

Keywords

  • Analog circuit
  • Biasing circuit
  • Low-temperature polycrystalline silicon (LTPS)
  • Thin-film transistor (TFT)
  • Threshold-voltage compensation
  • Threshold-voltage variation

Fingerprint Dive into the research topics of 'New gate-bias voltage-generating technique with threshold-voltage compensation for on-glass analog circuits in LTPS process'. Together they form a unique fingerprint.

Cite this