A new device structure called the neuron-bipolar junction transistor(vBJT) for the compact implementation of VLSI neural network is proposed and analyzed. In the new device structure, the parasitic PNP bipolar junction transistor in the CMOS process is used to implement the neuron whereas the spreading base resistor array is used to realize the synapse weights for various neuron inputs. The multi-emitter structure can also be used to generate the multi-out neuron response. The vBJT neuron cell has the advantages of compact structure and small chip size. The vBJT neuron cell has been successfully applied to the implementation of the analog Hamming neural network. The analog Hamming network can store many sets of examplar patterns with different gray levels. Moreover, the input patterns can be weighted or scaled to eliminate the common offsets and increase the dynamic range and the processing flexibility. With simple and compact structure and high integration capability, the proposed vBJT has a great potential in the VLSI implementation of neural network.
|Number of pages||4|
|State||Published - 1 Dec 1998|
|Event||Proceedings of the 1998 5th IEEE International Conference on Electronics, Circuits and Systems (ICECS'98) - Surfing the Waves of Science and Technology - Lisboa, Portugal|
Duration: 7 Sep 1998 → 10 Sep 1998
|Conference||Proceedings of the 1998 5th IEEE International Conference on Electronics, Circuits and Systems (ICECS'98) - Surfing the Waves of Science and Technology|
|Period||7/09/98 → 10/09/98|