NBTI and leakage reduction using ILP-based approach

Ing Chao Lin; Kuan Hui Li; Chia Hao Lin; Kai-Chiang Wu

doi:10.1109/TVLSI.2013.2280651

NBTI and leakage reduction using ILP-based approach

Ing Chao Lin, Kuan Hui Li, Chia Hao Lin, Kai-Chiang Wu

Department of Computer Science

Research output: Contribution to journal › Article

3 Scopus citations

Abstract

We propose an integer linear programming-based formulation to improve the effectiveness of the transmission gate-based technique intended to reduce negative-bias temperature instability and leakage power consumption. We also propose a virtual input pin technique to improve leakage reduction and use path sensitization to reduce area overhead. Simulation results show that combining these techniques can achieve >51.18% delay improvement and 63.34% leakage power improvement with only 2.31% area overhead.

Original language	English
Article number	6607241
Pages (from-to)	2034-2038
Number of pages	5
Journal	IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume	22
Issue number	9
DOIs	https://doi.org/10.1109/TVLSI.2013.2280651
State	Published - 1 Jan 2014

Keywords

Aging mitigation
Integer linear programming (ILP)
Leakage reduction
Negative-bias temperature instability (NBTI)
Virtual pin

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10.1109/TVLSI.2013.2280651

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Lin, I. C., Li, K. H., Lin, C. H., & Wu, K-C. (2014). NBTI and leakage reduction using ILP-based approach. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 22(9), 2034-2038. [6607241]. https://doi.org/10.1109/TVLSI.2013.2280651

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