Nanoscale ultra-thin-body silicon-on-insulator P-MOSFET with a SiGe/Si heterostructure channel

Yee Chia Yeo; Vivek Subramanian; Jakub Kedzierski; Peiqi Xuan; Tsu Jae King; Jeffrey Bokor; Chen-Ming Hu

doi:10.1109/55.830968

Nanoscale ultra-thin-body silicon-on-insulator P-MOSFET with a SiGe/Si heterostructure channel

Yee Chia Yeo, Vivek Subramanian, Jakub Kedzierski, Peiqi Xuan, Tsu Jae King, Jeffrey Bokor, Chen-Ming Hu

International College of Semiconductor Technology

Research output: Contribution to journal › Article › peer-review

49 Scopus citations

Abstract

We report the concept and demonstration of a nanoscale ultra-thin-body silicon-on-insulator (SOI) P-channel MOSFET with a Si_1-xGe_x/Si heterostructure channel. First, a novel lateral solid-phase epitaxy process is employed to form an ultra-thin-body that suppresses the short-channel effects. Negligible threshold voltage roll-off is observed down to a channel length of 50 nm. Second, a selective silicon implant that breaks up the interfacial oxide is shown to facilitate unilateral crystallization to form a single crystalline channel. Third, the incorporation of SiGe in the channel resulted in a 70% enhancement in the drive current.

Original language	English
Pages (from-to)	161-163
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	21
Issue number	4
DOIs	https://doi.org/10.1109/55.830968
State	Published - 1 Apr 2000

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@article{59b0656d3109479db1e8006e990fcc60,

title = "Nanoscale ultra-thin-body silicon-on-insulator P-MOSFET with a SiGe/Si heterostructure channel",

abstract = "We report the concept and demonstration of a nanoscale ultra-thin-body silicon-on-insulator (SOI) P-channel MOSFET with a Si1-xGex/Si heterostructure channel. First, a novel lateral solid-phase epitaxy process is employed to form an ultra-thin-body that suppresses the short-channel effects. Negligible threshold voltage roll-off is observed down to a channel length of 50 nm. Second, a selective silicon implant that breaks up the interfacial oxide is shown to facilitate unilateral crystallization to form a single crystalline channel. Third, the incorporation of SiGe in the channel resulted in a 70% enhancement in the drive current.",

author = "Yeo, {Yee Chia} and Vivek Subramanian and Jakub Kedzierski and Peiqi Xuan and King, {Tsu Jae} and Jeffrey Bokor and Chen-Ming Hu",

year = "2000",

month = apr,

day = "1",

doi = "10.1109/55.830968",

language = "English",

volume = "21",

pages = "161--163",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "4",

}

TY - JOUR

T1 - Nanoscale ultra-thin-body silicon-on-insulator P-MOSFET with a SiGe/Si heterostructure channel

AU - Yeo, Yee Chia

AU - Subramanian, Vivek

AU - Kedzierski, Jakub

AU - Xuan, Peiqi

AU - King, Tsu Jae

AU - Bokor, Jeffrey

AU - Hu, Chen-Ming

PY - 2000/4/1

Y1 - 2000/4/1

N2 - We report the concept and demonstration of a nanoscale ultra-thin-body silicon-on-insulator (SOI) P-channel MOSFET with a Si1-xGex/Si heterostructure channel. First, a novel lateral solid-phase epitaxy process is employed to form an ultra-thin-body that suppresses the short-channel effects. Negligible threshold voltage roll-off is observed down to a channel length of 50 nm. Second, a selective silicon implant that breaks up the interfacial oxide is shown to facilitate unilateral crystallization to form a single crystalline channel. Third, the incorporation of SiGe in the channel resulted in a 70% enhancement in the drive current.

AB - We report the concept and demonstration of a nanoscale ultra-thin-body silicon-on-insulator (SOI) P-channel MOSFET with a Si1-xGex/Si heterostructure channel. First, a novel lateral solid-phase epitaxy process is employed to form an ultra-thin-body that suppresses the short-channel effects. Negligible threshold voltage roll-off is observed down to a channel length of 50 nm. Second, a selective silicon implant that breaks up the interfacial oxide is shown to facilitate unilateral crystallization to form a single crystalline channel. Third, the incorporation of SiGe in the channel resulted in a 70% enhancement in the drive current.

UR - http://www.scopus.com/inward/record.url?scp=0033901411&partnerID=8YFLogxK

U2 - 10.1109/55.830968

DO - 10.1109/55.830968

M3 - Article

AN - SCOPUS:0033901411

VL - 21

SP - 161

EP - 163

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

SN - 0741-3106

IS - 4

ER -