Nanoscale p-MOS thin-film transistor with TiN gate electrode fabricated by low-temperature microwave dopant activation

Yu Lun Lu*, Fu Kuo Hsueh, Kuo Ching Huang, Tz Yen Cheng, Jeff M. Kowalski, Jeff E. Kowalski, Yao Jen Lee, Tien-Sheng Chao, Ching Yi Wu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

14 Scopus citations

Abstract

In this letter, nanoscale p-MOS TFTs with a TiN gate electrode were realized using a novel microwave (MW) dopant-activation technique. We compared both low-temperature MW annealing and rapid thermal annealing. We successfully activated the source/drain region and suppressed the short-channel effects using low-temperature MW annealing. This technique is promising from the viewpoint of realizing high-performance and low-cost upper layer nanoscale transistors required for low-temperature 3-D integrated circuit fabrication.

Original languageEnglish
Article number5427093
Pages (from-to)437-439
Number of pages3
JournalIEEE Electron Device Letters
Volume31
Issue number5
DOIs
StatePublished - 1 May 2010

Keywords

  • Low temperature
  • Metal gate
  • Microwave (MW) anneal
  • Rapid thermal annealing (RTA)

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