We report a self-aligned technology for nanoflash devices with double floating gates using scanning probe lithography (SPL) technology and anisotropic wet etching. On a (110) SOI silicon wafer, along  and  directions, a silicon nanowire was generated through local oxidation with SPL followed by wet etching with tetramethylammonium hydroxide solution. Silicon nanowires (SiNW) with profiles of sidewall either sloped or vertical were formed after anisotropic etching in the  or  direction respectively. After deposition of a polysilicon film on the SiNW with low pressure chemical vapor deposition, nanostructures of a nanoflash device with polysilicon double-floating side gates were obtained along the  part of SiNW after reactive ion etching spacer etching. The silicon nanowire channel has a width of 20 nm and a height of 200 nm; the width of the self-aligned floating gate is approximately 40 nm. Silicon nitride was deposited to serve as gate dielectric. The top gate and source-drain aluminum pads were defined by photolithography. Electrical properties of such a nanoflash device with double-floating side gates are discussed.
|Number of pages||4|
|Journal||Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures|
|State||Published - 1 Nov 2004|