Nano CMOS device quantum simulation: Impact of surface roughness on silicon and Germanium ultra-thin-body MOSFETs

Tony Low, M. F. Li, W. J. Fan, S. T. Ng, Y. C. Yeo, C. Zhu, Albert Chin, L. Chan, D. L. Kwong

Research output: Chapter in Book/Report/Conference proceedingChapter

Abstract

Ultra-Ihin body (UTB) SOI MOSFET is promising for sub-50 nm CMOS technologies [1] However, recent experimental finding [2] suggests the need for serious reconsiderations of its long-term scaling capability into the sub-10 nm body thickness (TBDDY) regime. Two new phenomena attributed to surface roughness (SR) are identified [2]; they are enhanced threshold voltage (VTH) shifts and drastic. degradation of mobility with aTBODYdependence [2,3]. In this work, we detail a study of these two phenomena in UTB MOSFETs with sub 10 nm TaODY Si and Ge channels. Firstly, the phenomena of enhanced VTHshifts is modeled by accounting for the fluctuation of quantized energy levels due to SR up to second order approximation. Good corroboration with experimental results [2] is obtained. Our model is then applied to examine the impact of enhanced VTHshifts on metal gate work function requirements. Secondly, we modeled the SR-limited electron and hole mobility and discuss their impact on the choice of suiface orientations. Mobility anisotropy are also examined for the various surface orientations.

Original languageEnglish
Title of host publicationSelected Semiconductor Research
PublisherImperial College Press
Pages441-444
Number of pages4
ISBN (Electronic)9781848164079
ISBN (Print)9781848164062
DOIs
StatePublished - 1 Jan 2011

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    Low, T., Li, M. F., Fan, W. J., Ng, S. T., Yeo, Y. C., Zhu, C., Chin, A., Chan, L., & Kwong, D. L. (2011). Nano CMOS device quantum simulation: Impact of surface roughness on silicon and Germanium ultra-thin-body MOSFETs. In Selected Semiconductor Research (pp. 441-444). Imperial College Press. https://doi.org/10.1142/9781848164079_0007