Multichip module based RISC processor with programmable hardware

Michael Newell*, Wai-Chi  Fang, Richard Johannesson, Leon Alkalai

*Corresponding author for this work

Research output: Contribution to journalConference article

Abstract

A multichip module (MCM) based RISC processor with programmable hardware has been developed for the new era of miniaturized spacecraft required for NASA's 'faster, better, cheaper' missions. The MCM based processor incorporates a complete 32-bit RISC computer including RAM, EEPROM and programmable hardware. This paper describes the system architecture and its associated MCM design and implementation. It also explores the architectural merits of including user programmable hardware.

Original languageEnglish
Pages (from-to)119-122
Number of pages4
JournalProceedings of the Annual IEEE International ASIC Conference and Exhibit
DOIs
StatePublished - 1 Dec 1995
EventProceedings of the 8th Annual IEEE International ASIC Conference and Exhibit - Austin, TX, USA
Duration: 18 Sep 199522 Sep 1995

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