MoS 2 U-shape MOSFET with 10 nm channel length and poly-Si source/drain serving as seed for full wafer CVD MoS 2 availability

Kai Shin Li, Bo Wei Wu, Lain Jong Li, Ming Yang Li, Chia Chin Kevin Cheng, Cho Lun Hsu, Chang Hsien Lin, Yi Ju Chen, Chun Chi Chen, Chien Ting Wu, Min Cheng Chen, Jia Min Shieh, Wen Kuan Yeh, Yu Lun Chueh, Fu Liang Yang, Chen-Ming Hu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

A U-shape MoS 2 pMOSFET with 10nm channel and poly-Si source/drain is demonstrated. The fabrication process is simple. Because the Si S/D serves as the nucleation seed for CVD MoS 2 deposition, thin MoS 2 is well deposited in the channel region any where over the fully scale oxide coated Si wafer. This is a big step forward toward a low cost multi-layer stacked TMD IC technology.

Original languageEnglish
Title of host publication2016 IEEE Symposium on VLSI Technology, VLSI Technology 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509006373
DOIs
StatePublished - 21 Sep 2016
Event36th IEEE Symposium on VLSI Technology, VLSI Technology 2016 - Honolulu, United States
Duration: 13 Jun 201616 Jun 2016

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
Volume2016-September
ISSN (Print)0743-1562

Conference

Conference36th IEEE Symposium on VLSI Technology, VLSI Technology 2016
CountryUnited States
CityHonolulu
Period13/06/1616/06/16

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