A new algorithm to improve the efficiency of CMOS-parameter extractions is proposed and investigated. The basic approach is to optimize the device parameters so that the drain-current slope in the linear region and the drain-current in the saturation region are fitted accurately along the transient-trajectory bands rather than the whole I-V characteristics. The generation of trajectories and their figures are demonstrated. Examples and experiments are given to verify the proposed new method. It is shown that the new method can reduce the CPU time and speed up the convergence of parameter optimization. Moreover, it can retain the accuracy of the extracted parameters in transient simulations. These features make the proposed approach quite helpful in parameter extraction of small-geometry devices for VLSI digital ICs.