MOS-bounded diodes for on-chip ESD protection in deep submicron CMOS process

Ming-Dou Ker*, Kun Hsien Lin, Che Hao Chuang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

1 Scopus citations

Abstract

New diode structures without the field-oxide boundary across the p/n junction for ESD protection are proposed. A NMOS (PMOS) is especially inserted into the diode structure to form the NMOS-bounded (PMOS-bounded) diode, which is used to block the field oxide isolation across the p/n junction in the diode structure. The proposed N(P)MOS-bounded diodes can provide more efficient ESD protection to the internal circuits, as compared to the other diode structures. The N(P)MOS-bounded diodes can be used in the I/O ESD protection circuits, power-rail ESD clamp circuits, and the ESD conduction cells between the separated power lines. From the experimental results, the human-body-model ESD level of ESD protection circuit with the proposed N(P)MOS-bounded diodes is greater than 8 kV in a 0.35-μm CMOS process.

Original languageEnglish
Pages (from-to)429-436
Number of pages8
JournalIEICE Transactions on Electronics
VolumeE88-C
Issue number3
DOIs
StatePublished - 1 Jan 2005

Keywords

  • Diode
  • Electrostatic discharge (ESD)
  • ESD protection
  • MOS-bounded diode
  • Poly-bounded diode

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