More effective power-gated circuit optimization with multi-bit retention registers

Shu Hung Lin*, Po-Hung Lin

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

Applying retention registers is one of the most effective and efficient approaches to keep flip-flop states in power-gated circuits during the sleep mode. Instead of replacing each flip-flop in a power-gated circuit with a single-bit retention register (SBRR), recent research has shown that applying multi-bit retention registers (MBRRs) can effectively reduce the storage size, and hence save more chip area and leakage power. However, the previous work simply adopted greedy heuristics for power-gated circuit optimization with MBRRs, which first break feedback paths and then iteratively replace a flip-flop covering the maximum number of (k-1)-link paths with a k-bit retention register. Different from the previous work, this paper presents an even more effective approach based on integer-linear-programming (ILP) formulation with simultaneous consideration of all feedback paths. Experimental results show that the proposed approach can further reduce up to 46% storage size compared with the previous work.

Original languageEnglish
Title of host publication2014 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2014 - Digest of Technical Papers
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages213-217
Number of pages5
Volume2015-January
EditionJanuary
ISBN (Electronic)9781479962785
DOIs
StatePublished - 5 Jan 2015
Event2014 33rd IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2014 - San Jose, United States
Duration: 2 Nov 20146 Nov 2014

Publication series

NameIEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISSN (Print)1092-3152

Conference

Conference2014 33rd IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2014
CountryUnited States
CitySan Jose
Period2/11/146/11/14

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