Modeling of Induced Gate Thermal Noise Including Back-Bias Effect in FDSOI MOSFET

Chetan Kumar Dabhi*, Avirup Dasgupta, Pragya Kushwaha, Harshit Agarwal, Chen-Ming Hu, Yogesh Singh Chauhan

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

3 Scopus citations

Abstract

We present a charge-based compact model for induced gate thermal noise for a fully depleted silicon-on-insulator transistor. The model uses front- and back-gate charges as well as the respective mobilities for the development of analytical expression. The model is implemented in Verilog-A and validated with experimentally calibrated TCAD simulations. The model predicts the high-frequency behavior with good accuracy while capturing the back-bias dependence.

Original languageEnglish
Pages (from-to)597-599
Number of pages3
JournalIEEE Microwave and Wireless Components Letters
Volume28
Issue number7
DOIs
StatePublished - 1 Jul 2018

Keywords

  • Compact model
  • fully depleted silicon on insulator (FDSOI)
  • high frequency
  • induced gate noise
  • noise
  • power spectral density (PSD)
  • ultrathin body silicon on insulator
  • ultrathin body with thin box (UTBB)

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