Modeling of GeOI and validation with Ge-CMOS inverter circuit using BSIM-IMG industry standard model

Harshit Agarwal; Pragya Kushwaha; Yogesh S. Chauhan; Sourabh Khandelwal; Juan P. Duarte; Yen Kai Lin; Huan Lin Chang; Chen-Ming Hu; Heng Wu; Peide D. Ye

doi:10.1109/EDSSC.2016.7785303

Modeling of GeOI and validation with Ge-CMOS inverter circuit using BSIM-IMG industry standard model

Harshit Agarwal, Pragya Kushwaha, Yogesh S. Chauhan, Sourabh Khandelwal, Juan P. Duarte, Yen Kai Lin, Huan Lin Chang, Chen-Ming Hu, Heng Wu, Peide D. Ye

International College of Semiconductor Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

4 Scopus citations

Abstract

Recently, experimental Germanium CMOS devices and circuit are reported for advanced technology nodes for the first time. In this paper, we have modeled Germanium On Insulator (GeOI) device with industry standard compact model for independent double gate MOSFET (BSIM-IMG) with updated mobility model. It is shown that BSIM-IMG with updated mobility model accurately captures static characteristics for both n-channel and p-channel devices, and reproduces experimental CMOS inverter characteristics. This is the first time, when a compact model is validated on experimental CMOS circuit operation of GeOI.

Original language	English
Title of host publication	2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	444-447
Number of pages	4
ISBN (Electronic)	9781509018307
DOIs	https://doi.org/10.1109/EDSSC.2016.7785303
State	Published - 15 Dec 2016
Event	2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016 - Hong Kong, Hong Kong Duration: 3 Aug 2016 → 5 Aug 2016

Publication series

Name	2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016

Conference

Conference	2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016
Country	Hong Kong
City	Hong Kong
Period	3/08/16 → 5/08/16

Keywords

BSIM-IMG
Compact Model
Germanium CMOS
Germanium on Insulator

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Agarwal, H., Kushwaha, P., Chauhan, Y. S., Khandelwal, S., Duarte, J. P., Lin, Y. K., Chang, H. L., Hu, C-M., Wu, H., & Ye, P. D. (2016). Modeling of GeOI and validation with Ge-CMOS inverter circuit using BSIM-IMG industry standard model. In 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016 (pp. 444-447). [7785303] (2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDSSC.2016.7785303

Agarwal, Harshit ; Kushwaha, Pragya ; Chauhan, Yogesh S. ; Khandelwal, Sourabh ; Duarte, Juan P. ; Lin, Yen Kai ; Chang, Huan Lin ; Hu, Chen-Ming ; Wu, Heng ; Ye, Peide D. / Modeling of GeOI and validation with Ge-CMOS inverter circuit using BSIM-IMG industry standard model. 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016. Institute of Electrical and Electronics Engineers Inc., 2016. pp. 444-447 (2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016).

@inproceedings{5996af3b5bc04107a39214fd7de29952,

title = "Modeling of GeOI and validation with Ge-CMOS inverter circuit using BSIM-IMG industry standard model",

abstract = "Recently, experimental Germanium CMOS devices and circuit are reported for advanced technology nodes for the first time. In this paper, we have modeled Germanium On Insulator (GeOI) device with industry standard compact model for independent double gate MOSFET (BSIM-IMG) with updated mobility model. It is shown that BSIM-IMG with updated mobility model accurately captures static characteristics for both n-channel and p-channel devices, and reproduces experimental CMOS inverter characteristics. This is the first time, when a compact model is validated on experimental CMOS circuit operation of GeOI.",

keywords = "BSIM-IMG, Compact Model, Germanium CMOS, Germanium on Insulator",

author = "Harshit Agarwal and Pragya Kushwaha and Chauhan, {Yogesh S.} and Sourabh Khandelwal and Duarte, {Juan P.} and Lin, {Yen Kai} and Chang, {Huan Lin} and Chen-Ming Hu and Heng Wu and Ye, {Peide D.}",

year = "2016",

month = dec,

day = "15",

doi = "10.1109/EDSSC.2016.7785303",

language = "English",

series = "2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "444--447",

booktitle = "2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016",

address = "United States",

note = "null ; Conference date: 03-08-2016 Through 05-08-2016",

}

Agarwal, H, Kushwaha, P, Chauhan, YS, Khandelwal, S, Duarte, JP, Lin, YK, Chang, HL, Hu, C-M, Wu, H & Ye, PD 2016, Modeling of GeOI and validation with Ge-CMOS inverter circuit using BSIM-IMG industry standard model. in 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016., 7785303, 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016, Institute of Electrical and Electronics Engineers Inc., pp. 444-447, 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016, Hong Kong, Hong Kong, 3/08/16. https://doi.org/10.1109/EDSSC.2016.7785303

Modeling of GeOI and validation with Ge-CMOS inverter circuit using BSIM-IMG industry standard model. / Agarwal, Harshit; Kushwaha, Pragya; Chauhan, Yogesh S.; Khandelwal, Sourabh; Duarte, Juan P.; Lin, Yen Kai; Chang, Huan Lin; Hu, Chen-Ming; Wu, Heng; Ye, Peide D.

2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016. Institute of Electrical and Electronics Engineers Inc., 2016. p. 444-447 7785303 (2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Modeling of GeOI and validation with Ge-CMOS inverter circuit using BSIM-IMG industry standard model

AU - Agarwal, Harshit

AU - Kushwaha, Pragya

AU - Chauhan, Yogesh S.

AU - Khandelwal, Sourabh

AU - Duarte, Juan P.

AU - Lin, Yen Kai

AU - Chang, Huan Lin

AU - Hu, Chen-Ming

AU - Wu, Heng

AU - Ye, Peide D.

PY - 2016/12/15

Y1 - 2016/12/15

N2 - Recently, experimental Germanium CMOS devices and circuit are reported for advanced technology nodes for the first time. In this paper, we have modeled Germanium On Insulator (GeOI) device with industry standard compact model for independent double gate MOSFET (BSIM-IMG) with updated mobility model. It is shown that BSIM-IMG with updated mobility model accurately captures static characteristics for both n-channel and p-channel devices, and reproduces experimental CMOS inverter characteristics. This is the first time, when a compact model is validated on experimental CMOS circuit operation of GeOI.

AB - Recently, experimental Germanium CMOS devices and circuit are reported for advanced technology nodes for the first time. In this paper, we have modeled Germanium On Insulator (GeOI) device with industry standard compact model for independent double gate MOSFET (BSIM-IMG) with updated mobility model. It is shown that BSIM-IMG with updated mobility model accurately captures static characteristics for both n-channel and p-channel devices, and reproduces experimental CMOS inverter characteristics. This is the first time, when a compact model is validated on experimental CMOS circuit operation of GeOI.

KW - BSIM-IMG

KW - Compact Model

KW - Germanium CMOS

KW - Germanium on Insulator

UR - http://www.scopus.com/inward/record.url?scp=85010280268&partnerID=8YFLogxK

U2 - 10.1109/EDSSC.2016.7785303

DO - 10.1109/EDSSC.2016.7785303

M3 - Conference contribution

AN - SCOPUS:85010280268

T3 - 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016

SP - 444

EP - 447

BT - 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016

PB - Institute of Electrical and Electronics Engineers Inc.

Y2 - 3 August 2016 through 5 August 2016

ER -

Agarwal H, Kushwaha P, Chauhan YS, Khandelwal S, Duarte JP, Lin YK et al. Modeling of GeOI and validation with Ge-CMOS inverter circuit using BSIM-IMG industry standard model. In 2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016. Institute of Electrical and Electronics Engineers Inc. 2016. p. 444-447. 7785303. (2016 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2016). https://doi.org/10.1109/EDSSC.2016.7785303