Modeling CMOS tunneling currents through ultrathin gate oxide due to conduction-and valence-band electron and hole tunneling

Wen Chin Lee*, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

275 Scopus citations

Abstract

A semi-empirical model is proposed to quantify the tunneling currents through ultrathin gate oxides (1-3.6 nm). As a multiplier to a simple analytical model [1], [2], a correction function is introduced to achieve universal applicability to all different combinations of bias polarities (inversion and accumulation), gate materials (N +, P +, Si, SiGe) and tunneling processes. Each coefficient of the correction function is given a physical meaning and determined by empirical fitting. This new model can accurately predict all the current components that can be observed: Electron tunneling from the conduction band (ECB), electron tunneling from the valence band (EVB), and hole tunneling from the valence band (HVB) in dual-gate poly-Si 1-x Ge x-gated (x = 0 or 0.25) CMOS devices for various gate oxide thicknesses. In addition, this model can also be employed to determine the physical oxide thickness from I-V data with high sensitivity. It is particularly sensitive in th e very-thin-oxide regime, where C-V extraction happens to be difficult or impossible (because of the presence of the large tunneling current).

Original languageEnglish
Pages (from-to)1366-1373
Number of pages8
JournalIEEE Transactions on Electron Devices
Volume48
Issue number7
DOIs
StatePublished - 1 Jul 2001

Keywords

  • Direct tunneling model
  • Hole tunneling
  • Tunneling current
  • Ultrathin gate oxide

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