Modeling and minimizing variations of gate-all-around multiple-channel nanowire TFTs

Po Chun Huang, Lu An Chen, C. C. Chen, Jeng-Tzong Sheu*

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

In this paper we describe the electrical performance of poly-Si gate-all-around (GAA) thin-film transistors (TFTs) featuring multiple-channel nanowires (NWs). To minimize the variation in the electrical characteristics of these TFTs, we compared the effects of several approach, including the use of a multiple-gate structure, the number of multiple channels, and NH 3 plasma treatment. Relative to a tri-gate structure, the GAA devices exhibited superior performance. In addition, the presence of multiple channels efficiently reduced the variation in the electrical characteristics. Devices featuring 16-cnannel present the minimized standard deviation in both threshold voltage and subthreshold swing (30 mV and 11.4 mV/dec, respectively). The device-to-device variation due to random grain-size distribution in poly-Si GAA NW TFT was modeled by Poisson area scatter model. The electrical measurements of poly-Si GAA NW TFTs and the model are in agreement. Finally, NH 3 plasma treatment of the GAA TFTs featuring multiple channels further decreased the electrical variations and improved the device performance.

Original languageEnglish
Title of host publication2011 11th IEEE International Conference on Nanotechnology, NANO 2011
Pages600-603
Number of pages4
DOIs
StatePublished - 1 Dec 2011
Event2011 11th IEEE International Conference on Nanotechnology, NANO 2011 - Portland, OR, United States
Duration: 15 Aug 201119 Aug 2011

Publication series

NameProceedings of the IEEE Conference on Nanotechnology
ISSN (Print)1944-9399
ISSN (Electronic)1944-9380

Conference

Conference2011 11th IEEE International Conference on Nanotechnology, NANO 2011
CountryUnited States
CityPortland, OR
Period15/08/1119/08/11

Keywords

  • gate-all-around (GAA)
  • multiple nanowire channel
  • Poisson area scatter model
  • thin-film transistor

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    Huang, P. C., Chen, L. A., Chen, C. C., & Sheu, J-T. (2011). Modeling and minimizing variations of gate-all-around multiple-channel nanowire TFTs. In 2011 11th IEEE International Conference on Nanotechnology, NANO 2011 (pp. 600-603). [6144567] (Proceedings of the IEEE Conference on Nanotechnology). https://doi.org/10.1109/NANO.2011.6144567