Modeling advanced FET technology in a compact model

Mohan V. Dunga*, Chung Hsun Lin, Xuemei Xi, Darsen D. Lu, Ali M. Niknejad, Chen-Ming Hu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

68 Scopus citations

Abstract

The need for meeting the expectations of continuing the enhancement of CMOS performance and density has inspired the introduction of new materials into the classical single-gate bulk MOSFET and the development of nonclassical multigate transistors at an accelerated rate. There is a strong need to understand and model the associated new physics and electrical behavior to ensure widespread very-large-scale-integration circuit applications of new technologies. This paper presents some of the efforts toward the modeling of new technologies for bulk MOSFETs and multigate transistors. A holistic model for mobility enhancement through process-induced stress and a dynamic behavior model for high-k transistors have been developed to capture some of the new effects and new materials in the bulk MOSFET. A new analytical model is also presented for the fundamentally new device structure - FinFET.

Original languageEnglish
Pages (from-to)1971-1977
Number of pages7
JournalIEEE Transactions on Electron Devices
Volume53
Issue number9
DOIs
StatePublished - 1 Sep 2006

Keywords

  • Berkeley short-channel insulated-gate FET model (BSIM)
  • Compact modeling, dielectrics
  • Double-gate MOSFETS (DG-MOSFETS)
  • High-k
  • MOSFET
  • Process-induced strain

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