Minimized right-half plane zero effect on fast boost DC-DC converter achieved by adaptive voltage positioning technique

Jie Yu Liao*, Han Hsiang Huang, Ke-Horng Chen

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

The fast boost DC-DC converter designed with adaptive voltage positioning (AVP) technique to minimized the right-half plane zero effect is proposed. The concept of constant output impedance is a universal design principle in former works with AVP design. However, the right-half plane (RHP) zero appear in control to output transfer function of boost converter obstruct achievement of constant output impedance. The AC adjusting skill proposed in this paper illustrates how to obtain relative constant output impedance and accomplish the AVP characteristic in boost converter. The boost converter design with the AVP technique provides much faster response time and smaller voltage overshoots or undershoots during the load transient compared with any control scheme presented before. The simulation results is presented to show excellent performance of faster than 4ìs response time and the 40mV voltage drop when the load current changes from 100mA to 400mA.

Original languageEnglish
Title of host publicationISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems
Subtitle of host publicationNano-Bio Circuit Fabrics and Systems
Pages2916-2919
Number of pages4
DOIs
StatePublished - 31 Aug 2010
Event2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010 - Paris, France
Duration: 30 May 20102 Jun 2010

Publication series

NameISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems

Conference

Conference2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010
CountryFrance
CityParis
Period30/05/102/06/10

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