@inproceedings{8dd29defdeaf4591aec0f4a923a6c007,
title = "MAUI: Making aging useful, intentionally",
abstract = "Device aging, which causes significant loss on circuit performance and lifetime, has been a primary factor in reliability degradation of nanoscale designs. In this paper, we propose to take advantage of aging-induced clock skews (i.e., make them useful for aging tolerance) by manipulating these time-varying skews to compensate for the performance degradation of logic networks. The goal is to assign achievable/reasonable aging-induced clock skews in a circuit, such that its overall performance degradation due to aging can be minimized, that is, the lifespan can be maximized. On average, 25% aging tolerance can be achieved with insignificant design overhead.",
author = "Kai-Chiang Wu and Tseng, {Tien Hung} and Li, {Shou Chun}",
year = "2018",
month = apr,
day = "19",
doi = "10.23919/DATE.2018.8342064",
language = "English",
series = "Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "527--532",
booktitle = "Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018",
address = "United States",
note = "null ; Conference date: 19-03-2018 Through 23-03-2018",
}