MAUI: Making aging useful, intentionally

Kai-Chiang Wu, Tien Hung Tseng, Shou Chun Li

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Device aging, which causes significant loss on circuit performance and lifetime, has been a primary factor in reliability degradation of nanoscale designs. In this paper, we propose to take advantage of aging-induced clock skews (i.e., make them useful for aging tolerance) by manipulating these time-varying skews to compensate for the performance degradation of logic networks. The goal is to assign achievable/reasonable aging-induced clock skews in a circuit, such that its overall performance degradation due to aging can be minimized, that is, the lifespan can be maximized. On average, 25% aging tolerance can be achieved with insignificant design overhead.

Original languageEnglish
Title of host publicationProceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages527-532
Number of pages6
ISBN (Electronic)9783981926316
DOIs
StatePublished - 19 Apr 2018
Event2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018 - Dresden, Germany
Duration: 19 Mar 201823 Mar 2018

Publication series

NameProceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018
Volume2018-January

Conference

Conference2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018
CountryGermany
CityDresden
Period19/03/1823/03/18

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