MATERIAL PARAMETERS AFFECTING SURFACE LEAKAGE IN GAAS INTEGRATED CIRCUITS.

Mau-Chung Chang*, C. P. Lee, R. P. Vahrenkamp, L. D. Hou, D. E. Holmes, C. G. Kirkpatrick

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

A pseudo two-dimensional multi-conduction path model has been developed to explain substrate current leakage in GaAs integrated circuits based on trap-fill-limited carrier injection. Injection occurs at the n** plus -p-n** plus region near the substrate surface as a result of the outdiffusion of deep traps. The amount of current leakage and the threshold voltage for sudden current increase are correlated with the EL2 and carbon distribution in the substrate. Good agreement between the experimental results and the theoretical predictions is achieved.

Original languageEnglish
Title of host publicationUnknown Host Publication Title
EditorsDavid C. Look, John S. Blakemore
PublisherShiva Publ Ltd, Nantwich, Engl Also
Pages378-386
Number of pages9
ISBN (Print)1850140316
StatePublished - 1 Dec 1984

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    Chang, M-C., Lee, C. P., Vahrenkamp, R. P., Hou, L. D., Holmes, D. E., & Kirkpatrick, C. G. (1984). MATERIAL PARAMETERS AFFECTING SURFACE LEAKAGE IN GAAS INTEGRATED CIRCUITS. In D. C. Look, & J. S. Blakemore (Eds.), Unknown Host Publication Title (pp. 378-386). Shiva Publ Ltd, Nantwich, Engl Also.