MATERIAL PARAMETERS AFFECTING SURFACE LEAKAGE IN GAAS INTEGRATED CIRCUITS.

Mau-Chung Chang; C. P. Lee; R. P. Vahrenkamp; L. D. Hou; D. E. Holmes; C. G. Kirkpatrick

MATERIAL PARAMETERS AFFECTING SURFACE LEAKAGE IN GAAS INTEGRATED CIRCUITS.

Mau-Chung Chang^*, C. P. Lee, R. P. Vahrenkamp, L. D. Hou, D. E. Holmes, C. G. Kirkpatrick

^*Corresponding author for this work

Department of Electronics Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

A pseudo two-dimensional multi-conduction path model has been developed to explain substrate current leakage in GaAs integrated circuits based on trap-fill-limited carrier injection. Injection occurs at the n** plus -p-n** plus region near the substrate surface as a result of the outdiffusion of deep traps. The amount of current leakage and the threshold voltage for sudden current increase are correlated with the EL2 and carbon distribution in the substrate. Good agreement between the experimental results and the theoretical predictions is achieved.

Original language	English
Title of host publication	Unknown Host Publication Title
Editors	David C. Look, John S. Blakemore
Publisher	Shiva Publ Ltd, Nantwich, Engl Also
Pages	378-386
Number of pages	9
ISBN (Print)	1850140316
State	Published - 1 Dec 1984

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title = "MATERIAL PARAMETERS AFFECTING SURFACE LEAKAGE IN GAAS INTEGRATED CIRCUITS.",

abstract = "A pseudo two-dimensional multi-conduction path model has been developed to explain substrate current leakage in GaAs integrated circuits based on trap-fill-limited carrier injection. Injection occurs at the n** plus -p-n** plus region near the substrate surface as a result of the outdiffusion of deep traps. The amount of current leakage and the threshold voltage for sudden current increase are correlated with the EL2 and carbon distribution in the substrate. Good agreement between the experimental results and the theoretical predictions is achieved.",

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MATERIAL PARAMETERS AFFECTING SURFACE LEAKAGE IN GAAS INTEGRATED CIRCUITS. / Chang, Mau-Chung; Lee, C. P.; Vahrenkamp, R. P.; Hou, L. D.; Holmes, D. E.; Kirkpatrick, C. G.

Unknown Host Publication Title. ed. / David C. Look; John S. Blakemore. Shiva Publ Ltd, Nantwich, Engl Also, 1984. p. 378-386.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Chang, Mau-Chung

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AU - Holmes, D. E.

AU - Kirkpatrick, C. G.

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Y1 - 1984/12/1

N2 - A pseudo two-dimensional multi-conduction path model has been developed to explain substrate current leakage in GaAs integrated circuits based on trap-fill-limited carrier injection. Injection occurs at the n** plus -p-n** plus region near the substrate surface as a result of the outdiffusion of deep traps. The amount of current leakage and the threshold voltage for sudden current increase are correlated with the EL2 and carbon distribution in the substrate. Good agreement between the experimental results and the theoretical predictions is achieved.

AB - A pseudo two-dimensional multi-conduction path model has been developed to explain substrate current leakage in GaAs integrated circuits based on trap-fill-limited carrier injection. Injection occurs at the n** plus -p-n** plus region near the substrate surface as a result of the outdiffusion of deep traps. The amount of current leakage and the threshold voltage for sudden current increase are correlated with the EL2 and carbon distribution in the substrate. Good agreement between the experimental results and the theoretical predictions is achieved.

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