Low-voltage operation GaAs spike-gate power FET with high power-added efficiency

Tsuyoshi Tanaka*, Hidetoshi Furukawa, Hiroshi Takenaka, Tetsuzo Ueda, Takeshi Fukui, Daisuke Ueda

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

10 Scopus citations

Abstract

A GaAs power FET with a spike-gate has been developed for the high-efficiency operation under the extremely low supply voltage less than 1.5 V. The spike-gate provides both the low on-resistance of 2.2 ω7/mm and the high transconductance of 180 niS/nim without reducing the output impedance nor increasing the gate resistance. The implemented device achieved the output power of 31.5 dBm with 70% power-added efficiency at the frequency of 900 MHz. It should be noted that the present device kept PAE of 60% even at the bias of 0.5 V, which is the lowest voltage ever attained.

Original languageEnglish
Pages (from-to)354-359
Number of pages6
JournalIEEE Transactions on Electron Devices
Volume44
Issue number3
DOIs
StatePublished - 1 Dec 1997

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