Low thermal budget amorphous indium tungsten oxide nano-sheet junctionless transistors with near ideal subthreshold swing

Po Yi Kuo, Chien Min Chang, Po-Tsun Liu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

Amorphous indium tungsten oxide (a-IWO) nano-sheet (NS) junctionless (JL) transistors (a-IWO NS-JLTs) have been successfully fabricated and demonstrated in the category of indium oxide based thin film transistors (TFTs). We have scaled down thickness of a-IWO channel to 4nm. The proposed a-IWO NS-JLTs with low operation voltages exhibit good electrical characteristics: near ideal peak subthreshold swing (S.S.) ∼ 63mV/dec., high field-effect mobility (μ FE ) ∼ 25.3 cm 2 /V-s. The novel a-IWO NS-JLTs with low temperature processes are promising candidates for monolithic three-dimensional integrated circuits (3-D ICs), vertical stacked (VS) hybrid CMOS technology, and large-scale integration (LSI) applications in the future.

Original languageEnglish
Title of host publication2018 IEEE Symposium on VLSI Technology, VLSI Technology 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages21-22
Number of pages2
ISBN (Electronic)9781538642160
DOIs
StatePublished - 25 Oct 2018
Event38th IEEE Symposium on VLSI Technology, VLSI Technology 2018 - Honolulu, United States
Duration: 18 Jun 201822 Jun 2018

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
Volume2018-June
ISSN (Print)0743-1562

Conference

Conference38th IEEE Symposium on VLSI Technology, VLSI Technology 2018
CountryUnited States
CityHonolulu
Period18/06/1822/06/18

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  • Cite this

    Kuo, P. Y., Chang, C. M., & Liu, P-T. (2018). Low thermal budget amorphous indium tungsten oxide nano-sheet junctionless transistors with near ideal subthreshold swing. In 2018 IEEE Symposium on VLSI Technology, VLSI Technology 2018 (pp. 21-22). [8510684] (Digest of Technical Papers - Symposium on VLSI Technology; Vol. 2018-June). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSIT.2018.8510684